Programmable Logic



Arora® Family is designed to offer the best-in-class performance cost ratio FPGA. With abundant logic, high performance DSP resources and high speed I/O, the family is optimized for co-processing to offload the application processor on intensive computation tasks. The Arora® family is also the first FPGA with embedded SRAM in the industry, which gives customers more useable I/O.




Based on 55nm LP technology, LittleBee® family offers instant-on, non-volatile, low power, intensive I/O and small footprint FPGA (smallest as 2.4×2.3mm). The family is ideal for high performance bridging application and the first FPGA supports MIPI I3C and MIPI D-PHY standard in the industry. The LittleBee® family is also the first non-volatile FPGA with embedded SRAM in the industry, which further reduces the broad space.

• Low Power Non-volatile FPGA
• Best in class of Performance Cost Ratio
• Small footprint
• MIPI standard supported
• Embedded SDRAM/DDR (GW1NR only)

LittleBee Datasheet
FPGA Design Software

GOWIN EDA (YunYuan®) – our easy to use integrated design environment provides design engineers one-stop solution from design entry to verification.

• Complete GUI based environment from FPGA design entry, code synthesis, place & route, bitsteam generation to download on the GOWIN FPGA on your boards.
• Integrates SimplyPRO® from Synopsys® for front end design synthesis
• Supports creating RTL and Post-Synthesis.
• RTL input files are RTL file complied with Hardware Description
• Language and constraints file that users requires;
• Post-Synthesis input files are netlist file generated by user RTL
• synthesis and constraints files that users required.
• Integrates IP Core Generator
• Online debug tool Gowin Analysis Oscilloscope (GAO) for instant analyze of signal design

Gowin EDA